来源：《自然》
原文刊登日期：2021年6月9日
Researchers at Google have managed to greatly reduce the time needed to design microchips. This is an important achievement and will be a huge help in speeding up the supply chain, but the technical expertise must be shared widely. And the industry must make sure that the time-saving techniques do not drive away people with the necessary core skills.
谷歌的研究人员已经成功地大大减少了设计芯片所需的时间。这是一项重要的成就，对加速供应链将有巨大帮助，但这一专业技术应该得到广泛分享。而且，芯片行业必须确保这些节省时间的技术不会赶走那些拥有必要核心技能的人。
Researchers and engineers continue to design and manufacture microchips with ever more processing power and complexity. In line with Moore’s law — the principle that the number of transistors per chip doubles roughly every two years as transistors become smaller — the number of transistors per microchip has increased from a few thousand in the early 1970s to tens of billions today.
研究人员和工程师继续设计和制造处理能力和复杂性更高的芯片。根据摩尔定律(随着晶体管变小，每个芯片上的晶体管数量大约每两年翻一番)，每个芯片上的晶体管数量已从20世纪70年代初的几千个增加到今天的数百亿个。
Although fabrication of the chips is largely automated, the design still relies on manual processes. Engineers and designers use computer-aided design software, but it can still take them weeks or months to work out how to fit all the components into the available space. Google’s researchers have now shown that the process can be completed in less than a day by using artificial intelligence (AI).
虽然芯片的制造在很大程度上是自动化的，但设计仍然依赖人工过程。工程师和设计师使用计算机辅助设计软件，但他们仍然需要花费几周或几个月的时间来弄清楚如何将所有组件放入可用的空间。谷歌的研究人员现在已经表明，使用人工智能(AI)，这一过程可以在不到一天的时间内完成。
Typically, the area of a microchip is tens to hundreds of millimetres square. That space needs to accommodate thousands of components, such as memory, logic and processing units, plus many kilometres of ultra-thin wire to connect these components together. One of the most challenging aspects of the design process is ‘chip floorplanning’. This involves working out where best to place these components, in the same way that an architect designs a building’s internal space.
通常，一个芯片的面积在几十到几百平方毫米之间。这个空间需要容纳数千个组件，如内存、逻辑和处理单元，再加上长达数千米的超薄电线将这些组件连接在一起。设计过程中最具挑战性的方面之一是“芯片平面规划”。这涉及到如何最好地放置这些组件，就像建筑师设计建筑内部空间一样。
Google’s researchers used 10,000 chip floorplans to train their software. The software then worked out how to generate floorplans that used no more space, wire and electric power than did those designed by engineers. Miniaturization and low power are particularly important for the chips used in smartphones.
谷歌的研究人员使用了1万个芯片平面图来训练他们的软件。然后，该软件能计算出，在占用空间、电线多少和功耗方面，不比工程师设计的差的平面图。对于智能手机芯片来说，小型化和低功耗尤为重要。
The AI-generated chips took less than six hours to design, and the method has already been used to design Google’s tensor processing unit, or TPU, which is used mainly in the company’s cloud-based machine-learning applications. More teams need to test the design software to make sure it is robust and can accommodate other data sets and chip types. If more groups can recreate its success, that will cement its place in the chip-design toolbox.
人工智能生成的芯片设计耗时不到6个小时，而且该方法已经被用于设计谷歌的张量处理单元(TPU)，这主要用于谷歌基于云的机器学习应用程序。更多的团队需要测试这个设计软件，以确保它是健壮的，能够适应其他数据集和芯片类型。如果更多的团队能够重现它的成功，这将巩固它在芯片设计工具箱中的地位。
More-accessible and more-efficient microchips will power the development of autonomous vehicles, 5G communications and AI — opportunities that should not be missed. But it’s important to consider the wider implications of using automated design technologies, particularly the need for people with relevant skills and expertise, and for upskilling those who currently do the process manually.
更便捷、更高效的芯片将为自动驾驶汽车、5G通信和人工智能的发展提供动力——这些机遇不容错过。但是，重要的是要考虑使用自动化设计技术的更广泛的影响，特别是对具有相关技能和专业知识的人的需求，以及对那些目前手工完成流程的人的技能提升。